1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory.
2. Description of the Related Art
In order to write “0” data of a NAND-type flash memory, it is necessary that charges be injected in a charge accumulation layer by generating a sufficient potential difference between a control gate and a channel formed between a source and a drain.
On the other hand, in writing “1” data, a predetermined potential transferred from a sense amplifier is previously imparted to the channel such that the potential difference is not generated between the control gate and the channel, thereby preventing the charges from being injected in the charge accumulation layer (for example, see Jpn. Pat. Appln. KOKAI Publication No. 2007-226897).
However, with the advance of low-voltage operation of the NAND-type flash memory, actually the potential difference is generated between the control gate and the channel in a memory cell in which the “1” data should be written, which results in a phenomenon in which the charges are slightly injected (hereinafter the phenomenon is referred to as program disturb). That is, unfortunately, operation reliability of the NAND-type flash memory is deteriorated.